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Fast and Accurate Analytical Modeling of Through-Silicon-Via Capacitive Coupling

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3 Author(s)
Dae Hyun Kim ; Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA ; Mukhopadhyay, S. ; Sung Kyu Lim

In this paper, we present analytical models for fast estimation of coupling capacitance of square-shaped through-silicon vias (TSVs) in three-dimensional integrated circuits (3D ICs). Errors between our model and Synopsys Raphael simulation on regular TSV structures remain less than 6.03% while the computation time of our model for capacitance estimation is negligible. We also develop a simple capacitance estimation technique to extract TSV-to-TSV coupling capacitance in general layouts. Average errors between our model and Raphael simulation on random TSV structures is 5.06%-8.24%, and maximum errors remain less than 18.91% which is tolerable for fast capacitance estimation in computer-aided design area.

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Components, Packaging and Manufacturing Technology, IEEE Transactions on  (Volume:1 ,  Issue: 2 )