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The ultra-high density integrated circuits based on nanodevices will suffer from heat dissipation due to irreversible information erasure, limiting the reachable operating frequencies. This paper studies the amount of logical bits lost in standard binary adder structures, which are shown to be sub-optimal when compared with the theoretical limit. The analysis covers the pipelined ripple carry adder, the carry lookahead adder, and the conditional sum adder proposed for quantum-dot cellular automata implementation. The study focuses on majority logic circuits, available also in many other technologies.