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A systolic array architecture for the Applebaum-Howells array

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3 Author(s)
Ueno, M. ; Toshiba Res. & Dev. Center, Kawasaki, Japan ; Kawabata, K. ; Morooka, T.

A systolic array architecture for the Applebaum-Howells array is derived. The problem to be solved is the elimination of the global signal feedback loop in the conventional Applebaum-Howells array processor. The procedure involved in deriving the architecture consists of two steps: orthogonalization of the input element signals and elimination of the feedback loop. In the first step, the input element signals are orthogonalized with regard to each other by using the Gram-Schmidt processor, placed ahead of the Applebaum-Howells processor. It is shown in the second step that the orthogonality in the Gram-Schmidt processor output signals can remove the global signal feedback loop and that the Applebaum-Howells array can be implemented effectively by using a systolic array with regular structure and local communication. Simulation results also show that the proposed processor features desirable characteristics for the radiation pattern with low sidelobe level common to the Applebaum-Howells array

Published in:

Antennas and Propagation, IEEE Transactions on  (Volume:38 ,  Issue: 8 )

Date of Publication:

Aug 1990

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