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An Insight Into ESD Behavior of Nanometer-Scale Drain Extended NMOS (DeNMOS) Devices: Part II (Two-Dimensional Study-Biasing & Comparison With NMOS)

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6 Author(s)
Chatterjee, A. ; Dept. of Electr. Eng., Univ. of California, Santa Barbara, CA, USA ; Shrivastava, M. ; Gossner, H. ; Pendharkar, S.
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In this paper, we present an analysis of drain extended n-channel metal-oxide-semiconductor (DeNMOS) and study the impact of both substrate and gate biasing on the regenerative avalanche injection phenomenon at the edge of drain contact. We will demonstrate that the flow and distribution of avalanche-generated holes and electrons are significantly impacted by biasing the gate and pumping current through the substrate. Finally, we show that gate bias or drain bias, when individually applied, can only lead to marginal improvement in It2; however, when both the biases are applied simultaneously, it can then optimally improve the failure performance. Subsequently, we compare high current performance of DeNMOS with NMOS or swapped DeNMOS configuration through a simplified 1-D macroscopic model.

Published in:

Electron Devices, IEEE Transactions on  (Volume:58 ,  Issue: 2 )

Date of Publication:

Feb. 2011

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