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The interlaced carry-arrest adder

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1 Author(s)
Adly T. Fam ; Department of Electrical Engineering, The State University of New York at Buffalo, 14260, USA

The interlaced carry-arrest adder (ICA) is introduced as a new, fast multioperand adder to compute the sum of four or more numbers. To avoid the need to propagate the carry all the way to the most significant bits, periodic gaps of zeros are created in each of the summands by moving certain pattern of their bits into auxiliary arrays. The pattern of the moved bits is staggered, such that the auxiliary arrays are filled without overlaps and with a periodic pattern of gaps left unfilled such that the resulting auxiliary numbers also have the same staggered zero patterns as the summands. These gaps convert a sum of numbers with arbitrarily large number of bits to independent parallel additions of short pairs of numbers. This is so since any carry bits resulting from the addition of pairs of short numbers are trapped in the gaps. This allows for fast parallel addition that is truly independent of the number of bits of the summands, and depend only on the number of bits in the short numbers added in parallel, and logarithmically on the number of numbers to be added.

Published in:

2010 International Conference on Microelectronics

Date of Conference:

19-22 Dec. 2010