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A Cost-Effective Solution to Increase System Reliability and Maintain Global Performance under Unreliable Silicon in MPSoC

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5 Author(s)
Hébert, N. ; STMicroelectronics, Crolles, France ; Almeida, G.M. ; Benoit, P. ; Sassatelli, G.
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The increasing failure rates observed in very deep sub micron silicon technologies pose a major problem to the design of future high-density SoCs. Emerging new architecture based on Multiprocessor SoC (MPSoC) gives the opportunity to exploit the natural redundancy with replicated spare processor in order to maintain the system performance in presence of failures. Based on the assumption that a transient loss of functionality can be tolerated, we study the feasibility and propose a cost-effective dependable hardware/software method which self-substitutes faulty processors with spare processors in a distributed manner. It guarantees the integrity, improves the availability and eases the maintainability of the MPSoC at system-level.

Published in:
Reconfigurable Computing and FPGAs (ReConFig), 2010 International Conference on

Date of Conference: 13-15 Dec. 2010

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