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A Low-Cost MMSE-SIC Detector for the MIMO System: Algorithm and Hardware Implementation

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3 Author(s)
Tsung-hsien Liu ; Dept. of Commun. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan ; Jin-Yi Jiang ; Yuan-Sun Chu

We consider the minimum mean-squared error with successive interference cancellation (MMSE-SIC) detection of a frame of data in the spatially multiplexed multiple-input-multiple-output (MIMO) system. A complete MMSE-SIC detector needs to compute at both the preprocessing and SIC-detection stages. Since the SIC detection, which can be regarded as a backward substitution, is inevitable, we develop a computationally efficient preprocessing algorithm that relies on the backward substitution. We then propose a low-cost hardware architecture with a commonly shared backward-substitution module to work at both the preprocessing and detection stages. The very-large-scale-integration implementation results of our architecture for the four-by-four MIMO system using the 0.18-μm complementary metal-oxide-semiconductor technology reveal that our architecture requires the fewest 79-K gates, provides the high throughput rate of 416 Mb/s, and works with the smallest preprocessing latency of 64 clock cycles. Our MMSE-SIC detector is a cheap solution for MIMO detection.

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Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:58 ,  Issue: 1 )