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Etch mechanisms of silicon gate structures patterned in SF6/CH2F2/Ar inductively coupled plasmas

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5 Author(s)
Luere, O. ; Laboratoire des Technologies de la Microélectronique, CNRS/LTM, 17 rue des Martyrs (CEA-LETI), 38054 Grenoble Cedex 09, France ; Pargon, E. ; Vallier, L. ; Pelissier, B.
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Patterning complex metal gate stack becomes increasingly challenging since the gate dimension for all isolated as well as dense gate structures present on 300 mm wafer needs to be controlled within the nanometer range. In this article, the authors show that SF6/CH2F2/Ar plasma chemistries to etch the polysilicon gate present very interesting critical dimension (CD) control capabilities for advanced gate etch strategies compared to commonly used HBr/O2/Cl2 plasma chemistries, thanks to the different mechanisms involved in the passivation layer formation on the gate sidewalls. Indeed, contrary to HBr/Cl2/O2 plasma chemistries, the passivation layers in SF6/Ar/CH2F2 plasmas are not formed from deposition of etch by-products coming from the gas phase but the passivating species are chemically sputtered from the bottom of the etched structures and coat the silicon sidewalls by line of sight deposition. Such mechanisms result in thin and uniform CFX passivation layers on the gate sidewalls very similar in dense and isolated structures leading to an improved CD control.

Published in:

Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures  (Volume:29 ,  Issue: 1 )