Cart (Loading....) | Create Account
Close category search window
 

A high-speed arbitration scheme for an input buffering ATM switch architecture

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Jung-Hoon Paik ; Dept. of Radio Commun., Doowon Tech. Coll., South Korea ; Youn-Oh Jung ; Chae-Tak Lim

This paper proposes a high-speed arbitration scheme featuring high flexibility to bursty traffic for an input buffering ATM switch architecture and its hardware strategy. The arbitration sequence is given based on the threshold of the occupancy of the input buffer. The hardware strategy for the proposed policy is presented with the aim of simplifying the structure. The performance of the average buffer size of the proposed policy is performed and compared with the conventional scheme under bursty traffic conditions through simulation

Published in:

Circuits and Systems, 1996., IEEE Asia Pacific Conference on

Date of Conference:

18-21 Nov 1996

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.