Skip to Main Content
In this paper, a pulse width amplitude modulation multiplication scheme, that uses a novel flipped voltage follower (FVF) based current switch is presented. Simulations performed in Hspice with the standard AMI 0.5μm CMOS process shows a system with dynamic range of ±140 mV for both input signals with a maximum gain error of 1.1%. The circuit works with VDD = 3 V and a power consumption of 2.2 mW. The multiplier has a bandwidth of 16 kHz.
Date of Conference: Sept. 28 2010-Oct. 1 2010