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A novel load balancing method for multi-core with non-uniform memory architecture

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6 Author(s)
Youngho Ahn ; Dep. of Electronics, Computer & communication Engineering, Hanyang University, Seoul, Korea ; Won-Jin Kim ; Ki-Seok Chung ; Sea-Ho Kim
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As the number of cores in a processor increases, asymmetrically distributed memory architecture is expected to become widely adopted. Running an application program effectively in a distributed fashion on asymmetric memory architecture is a challenging task. In this paper, we propose a novel load balancing technique for multi-core systems with asymmetric memory architectures. The proposed method uses probabilistic information on the expected execution time of the child processes for each parent process. Also, to maximize the load balancing effect with low cost, the proposed method groups processes, and treats each group as a load balancing unit. The trade-off between load balancing effect of each load balancing unit and the cost is taken into account. To show the effectiveness of this paper, we present test cases in which the proposed method show better performance than that of existing load balancing methods.

Published in:

SoC Design Conference (ISOCC), 2010 International

Date of Conference:

22-23 Nov. 2010