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65 nm CMOS receiver with 4.2 dB NF and 66 dB gain for 60 GHz applications

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4 Author(s)
Wang, N.Y. ; Dept. of Electr. Eng., Univ. of California, Los Angeles, CA, USA ; Wu, H. ; Liu, J.Y.C. ; Chang, M.-C.F.

A direct conversion receiver for 60 GHz applications is fabricated in 65 nm CMOS. It consists of three low-noise amplifier gain stages, an RF mixer, a lowpass filter and a three-stage programmable gain amplifier. An overall minimum noise figure (NF) of 4.2 dB and maximum gain of 66 dB is achieved by the receiver occupying a core area of 0.26 mm2 while drawing 36 mA of current from a 1 V supply.

Published in:

Electronics Letters  (Volume:47 ,  Issue: 1 )