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Input pattern classification for detection of stuck-ON and bridging faults using IDDQ testing in BiCMOS and CMOS circuits

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3 Author(s)
Menon, S.M. ; Dept. of Electr. & Comput. Eng., South Dakota Sch. of Mines & Technol., Rapid City, SD, USA ; Malaiya, Y.K. ; Jayasumana, A.P.

Quiescent power supply current monitoring (IDDQ) has been shown to be effective for testing CMOS devices. BiCMOS is emerging as a major technology for high speed, high performance, digital and mixed signal applications. Stuck-ON faults as well as bridging faults in BiCMOS circuits cause enhanced IDDQ. An input pattern classification scheme is presented for detection of stuck-ON/bridging faults causing enhanced IDDQ. This technique can also be used for detecting IDDQ related faults in CMOS circuits

Published in:

VLSI Design, 1997. Proceedings., Tenth International Conference on

Date of Conference:

4-7 Jan 1997