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This paper presents a W-band receiver chipset for passive millimeter-wave imaging in a 65 nm standard CMOS technology. The system comprises a direct-conversion receiver front-end with injection-locked tripler and a companion analog back-end for Dicke radiometer. The receiver design addresses the high 1/f noise issue in the advanced CMOS technology. An LO generation scheme using a frequency tripler is proposed to lower the PLL frequency, making it suitable for use in multi-pixel systems. In addition, the noise performance of the receiver is further improved by optimum biasing of transistors of the detector in moderate inversion region to achieve the highest responsivity and lowest NEP. The front-end chipset exhibits a measured peak gain of 35 dB, -3 dB BW of 12 GHz, NF of 8.9 dB, while consuming 94 mW. The baseband chipset has a measured peak responsivity (Rv) of 6 KV/W and a noise equivalent power (NEP) of 8.54 pW/Hz1/2. The two chipsets integrated on-board achieve a total responsivity of 16 MV/W and a calculated Dicke NETD of 1K with a 30 ms integration time.
Date of Publication: Feb. 2011