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FLYER: fast fault simulation of linear analog circuits using polynomial waveform and perturbed state representation

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2 Author(s)
P. N. Variyam ; Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA ; A. Chatterjee

In this paper we propose a methodology for obtaining a closed form expression for the output of a linear analog circuits from its state-space description. Voltage waveforms at all the nodes of the circuit are obtained as polynomials in time. This closed form expressions for the circuit response together with the adjoint network method and sparse matrix techniques enhances fast parallel fault simulation. Experiments indicate that significant speedup of fault simulation over serial fault simulation using HSPICE can be obtained using our approach

Published in:

VLSI Design, 1997. Proceedings., Tenth International Conference on

Date of Conference:

4-7 Jan 1997