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A technology mapper for Xilinx FPGAs

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3 Author(s)
Chikodikar, M.Y. ; Silicon Automation Syst., Bangalore, India ; Laddha, Shridhar ; Sirasao, A.

This paper presents a method for area optimal technology mapping for Xilinx FPGAs. The method is modification of the method described previously and covers uniformly XC2000, XC3000 and XC4000 series of Xilinx FPGAs. The method addresses mapping of combinational and sequential logic onto Xilinx FPGAs. The results compare favorably with the existing mappers and the CLB estimates provided by the mapper are comparable with the CLB count obtained after passing the circuit through the Xilinx implementation kit

Published in:

VLSI Design, 1997. Proceedings., Tenth International Conference on

Date of Conference:

4-7 Jan 1997