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A V -Band Divide-by-4 Direct Injection-Locked Frequency Divider in 0.18- \mu{\hbox {m}} CMOS

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3 Author(s)
Hsieh-Hung Hsieh ; Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan ; Huan-Sheng Chen ; Liang-Hung Lu

In this paper, a novel circuit topology of a CMOS divide-by-4 direct injection-locked frequency divider is presented for millimeter-wave applications. To enhance the locking range for circuit operations with a division ratio of 4, a series peaking technique is introduced in the proposed divider structure such that improved input injection efficiency can be achieved. Using a standard 0.18-μm CMOS process, a V -band frequency divider is fabricated for demonstration. Operated at a supply voltage of 1.8 V, the divider core consumes a dc power of 12.6 mW. At an incident power of 0 dBm, the fabricated circuit exhibits an input locking range of 2.44 GHz in the vicinity of 60 GHz. The measured output power and locked phase noise at 1-MHz offset are -7 dBm and -133 dBc/Hz, respectively.

Published in:

Microwave Theory and Techniques, IEEE Transactions on  (Volume:59 ,  Issue: 2 )

Date of Publication:

Feb. 2011

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