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A 5 Gb/s Automatic Within-Pair Skew Compensator for Differential Data in 0.13 \mu{\hbox {m}} CMOS

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2 Author(s)
Yuxiang Zheng ; Electr. Eng. Dept., Univ. of Texas at Dallas, Richardson, TX, USA ; Jin Liu

This paper presents an automatic within-pair skew compensator for high-speed differential data transmission. A wide-bandwidth data delay line is proposed to provide adjustable delay for data signals. Also presented is an on-chip within-pair skew detection circuit to detect skew between the differential data signals for automatic close-loop skew compensation. A within-pair skew compensator prototype for 5 Gb/s data was fabricated in 0.13 μm CMOS. Measurement results show that the within-pair skew compensator can automatically compensate for within-pair skew of ± 200 ps (± 1 unit interval). It consumes 20.4 mW from 1.2 V supply and occupies 0.015 mm2 die area.

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Circuits and Systems I: Regular Papers, IEEE Transactions on  (Volume:58 ,  Issue: 6 )