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A completely integrated single-chip phase-locked loop was designed using a 0.2 /spl mu/m-enhancement/depletion AlGaAs/GaAs/AlGaAs-HEMT technology. The chip contains a VCO with 15 GHz center frequency, as well as a frequency divider, a phase detector, and a loop filter. The fabricated chip size is 1.5/spl times/1.5 mm/sup 2/. The power consumption is 0.5 W using a supply voltage of 5.0 V. The lock range is approximately /spl plusmn/270 MHz. The phase noise is -100 dBc/Hz at 100 kHz and -107 dBc/Hz at 1 MHz offset from the carrier, respectively.