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A 0.5/0.8-V 9-GHz Frequency Synthesizer With Doubling Generation in 0.13- \mu\hbox {m} CMOS

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4 Author(s)
Ching-Yuan Yang ; Dept. of Electr. Eng., Nat. Chung Hsing Univ., Taichung, Taiwan ; Chih-Hsiang Chang ; Jun-Hong Weng ; Hsin-Ming Wu

To lower the supply voltage for high-frequency operation, a fully integrated frequency synthesizer, together with regenerative frequency-doubling and fractional phase-rotating techniques, is presented. The frequency-doubling circuit regenerates the tail signals at twice the frequency of the quadrature voltage-controlled oscillator (QVCO) to achieve larger output swing and higher operating frequency for the synthesizer. Additionally, a hybrid circuit utilizing a new folded regime for the first-stage divider and the phase-rotating circuit is developed in the prescaler. Under full-speed operation, the QVCO with the frequency doubler and the divider can work from a 0.5-V supply, whereas the synthesizer dissipates 12 mW. At 9.1-GHz carrier frequency, the measured phase noise is -104.5 dBc/Hz from 1-MHz offset.

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Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:58 ,  Issue: 2 )