Referenced Items are not available for this document.
A 10-bit pipelined ADC employs both opamp-and time-sharing techniques to reduce the power consumption and silicon area. The proposed ADC needs only one opamp to complete the 10-bit conversion. This ADC has been fabricated in a 90-nm digital CMOS technology and occupies only 0.058 mm2. It operates at 100 MS/s and achieves an SNDR of 55.0 dB while the power consumption is 4.5 mW from a 1.0-V supply.
Published in:
Circuits and Systems I: Regular Papers, IEEE Transactions on
(Volume:58
,
Issue:
6
)
Date of Publication: June 2011
- Page(s):
- 1157 - 1166
- ISSN :
- 1549-8328
- INSPEC Accession Number:
- 12023236
- Digital Object Identifier :
- 10.1109/TCSI.2010.2092170
- Product Type:
- Journals & Magazines
- Date of Publication :
- 17 December 2010
- Date of Current Version :
- 27 May 2011
- Issue Date :
- June 2011
- Sponsored by :
- IEEE Circuits and Systems Society
About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies
A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.
