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Field-programmable gate arrays (FPGAs) can provide an efficient programmable resource for implementing hardware-based spiking neural networks (SNN). In this paper we present a hardware-software design that makes it possible to simulate large-scale (2 million neurons) biologically plausible SNNs on an FPGA-based system. We have chosen three SNN models from the various models available in the literature, the Hodgkin-Huxley (HH), Wilson and Izhikevich models, for implementation on the SRC 7 H MAP FPGA-based system. The models have various computation and communication requirements making them good candidates for a performance and optimization study of SNNs on an FPGA-based system. Significant acceleration of the SNN models using the FPGA is achieved: 38x for the HH model. This paper also provides insights into the factors affecting the speedup achieved such as FLOP:Byte ratio of the application, the problem size, and the optimization techniques available.