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Quantum-dot cellular automata (QCA) shows promise as a postsilicon CMOS, low-power computational technology. Nevertheless, to generalize QCA for next-generation digital devices, the ability to implement conventional programmable circuits based on nor, and , and or gates is necessary. To this end, we devise a new QCA structure, the QCA matrix multiplier (MM), employing the standard Coulomb blocked, five quantum-dot QCA cell and quasi-adiabatic switching for sequential data latching in the QCA cells. Our structure can multiply two N × M matrices, using one input and one bidirectional input/output data line. The calculation is highly parallelizable, and it is possible to achieve reduced calculation time in exchange for increasing numbers of parallel MM units. We show convergent, ab initio simulation results using the intercellular Hartree approximation for one, three, and nine MM units. The structure can generally implement any programmable logic array or any matrix multiplication-based operation.