By Topic

A research of dual-port SRAM cell using 8T

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Kai-ji Zhang ; Key Laboratory of Wide Band-gap Semiconductor Materials and Devices of Ministry of Education, School of Microelectronic, Xidian University, Xi'an 710071, China ; Kun Chen ; Wei-tao Pan ; Pei-jun Ma

High speed, low power and compatibility with standard technology Static random access memory (SRAM) is essential for system on chip (SoC) technology. In this paper, we first present a 6T-SRAM (1WR) and two types of 8T-SRAM cell(2WR 1W1R). After that how the (1W1R) cell work with external unit is explained, and we compare the SNM sensitivity and the write/read operations time of 1WR 1W1R cell.

Published in:

Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on

Date of Conference:

1-4 Nov. 2010