By Topic

High-k III–V MOSFETs enabled by atomic layer deposition

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Ye, P.D. ; Birck Nanotechnol. Center, Purdue Univ., West Lafayette, IN, USA

The principal obstacle to III-V compound semiconductors rivaling or exceeding the properties of Si electronics has been the lack of high-quality, thermodynamically stable insulators on III-V materials. For more than four decades, the research community has searched for suitable III-V compound semiconductor gate dielectrics or passivation layers. The research on ALD approach is of particular interest, since the Si industry is getting familiar with ALD Hf-based dielectrics and this approach has the potential to become a manufacturable technology.

Published in:

Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on

Date of Conference:

1-4 Nov. 2010