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In this paper, a compact model for phase change memory (PCM) based on carrier transport mechanism is presented. In this model, the set and reset resistances of the cell are calculated through the traditional transport theory and the hopping transport theory respectively, coupling with the temperature and the phase-change kinetics calculation. With the temperature-sensing and storage module embedded, this model is effective in partial crystallization condition. The I-V performance and the R-I status are calibrated by experimental data and numerical simulation. This model is implemented in Verilog-A, making it easily applied to many circuit level simulation tools and useful to PCM design.