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An analytical model for high voltage Thin-film Silicon-On-Insulator (TSOI) lateral devices is proposed in this paper. A new Reduced SURface Field (RESURF) criterion is obtained for TSOI lateral devices with a lateral linear doping in the drift region. The optimum drift doping profile for TSOI lateral devices can be obtained from the new RESURF criterion. The analytical results are in good agreement with the simulation results when the thickness of SOI layer is in the range of 0.05μm to 0.5μm. The electric field distribution is investigated in TSOI device with both a lateral linear doping profile and a low-k dielectric buried layer (LDLK TSOI). The electric field distribution of the drift region in the LDLK TSOI is improved by the linear doping profile, and the low-k dielectric buried layer enhances the electric field in the dielectric (EI). Both of them enhance the breakdown voltage (BV). The BV = 1297V and EI = 648V/μm of an LDLK TSOI lateral device is obtained by simulation on a 0.1μm SOI layer over 2μm low-k dielectric buried layer.