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A novel CMOS inverter composed of a junctionless NMOSFET and a gated N-N-N+ transistor for ULSI applications

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4 Author(s)
Kuan-Yu Lu ; Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan ; Jyi-Tsong Lin ; Hsuan-Hsu Chen ; Yi-Chuen Eng

In this paper, a novel non-classical CMOS inverter with simple process and high integration density is proposed, which is composed of a junctionless NMOSFET and a gated N--N-N+ transistor for driver and load, respectively. Also, the gated N--N-N+ transistor performance is also investigated. Based on the numerical simulations, we find out that the carrier mobility of the gated N--N-N+ transistor is enhanced significantly. Besides, the layout area of the novel CMOS inverter are reduced more than 46.1% because of its unique shared contacting for output node, when compared with the conventional layout area.

Published in:

Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on

Date of Conference:

1-4 Nov. 2010