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6×6 DPCNN: a programmable mixed analogue-digital chip for cellular neural networks

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3 Author(s)
M. Salerno ; Dept. of Electron. Eng., Rome Univ., Italy ; F. Sargeni ; V. Bonaiuto

The implementation of a versatile VLSI chip represents an important step to develop cellular neural networks (CNN). In this paper a VLSI realization of the multi-chip oriented, 6×6 digitally programmable cellular neural network (6×6 DPCNN) chip, is presented. This chip covers most of the available one-neighbourhood templates for image processing applications. Moreover, it can be easily interconnected to others to form very large CNN arrays

Published in:

Cellular Neural Networks and their Applications, 1996. CNNA-96. Proceedings., 1996 Fourth IEEE International Workshop on

Date of Conference:

24-26 Jun 1996