By Topic

Continuous time ΣΔ modulator based on digital delay loop and time quantisation

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $33
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
L. Hernandez ; Department of Electronic Technology, Universidad Carlos III ; E. Prefasi

A new sigma delta (ΣΔ) modulator suitable for ultra-low power data converters is introduced. The proposed architecture is based on time encoding and quantisation using voltage controlled delays such as digital inverters. The delays together with a phase comparator implement a synchronous pulse width modulator (PWM) and a discrete time integrator. An additional analogue integrator provides second-order noise shaping and compensates the nonlinearity of the digital delay. Time quantisation of the two-level PWM signal allows implementing a multibit modulator without requiring linear multibit DACs.

Published in:

Electronics Letters  (Volume:46 ,  Issue: 25 )