By Topic

Impact of HfTaO Buffer Layer on Data Retention Characteristics of Ferroelectric-Gate FET for Nonvolatile Memory Applications

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)

A p-channel metal-ferroelectric-insulator-silicon field-effect transistor (FET) with a 300-nm-thick SrBi2Ta2O9 (SBT) ferroelectric film and a 10-nm-thick HfTaO layer on silicon substrate was fabricated and characterized. The device shows a nearly unchanged memory window of about 0.9 V after a 2 × 1011-cycles fatigue test, an on/off current ratio of more than 107, and a field-effect mobility of approximately 42 cm2/V · s. Moreover, a drain-current on/off ratio as high as 105 was obtained with a fixed gate voltage of 2.5 V after over a 105 -s elapsed time without any obvious degradation. These results may suggest that the Pt/SBT/HfTaO/Si FET is suitable for high-performance ferroelectric memory.

Published in:

Electron Devices, IEEE Transactions on  (Volume:58 ,  Issue: 2 )