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A 128 Mb Chain FeRAM and System Design for HDD Application and Enhanced HDD Performance

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5 Author(s)
Daisaburo Takashima ; Center for Semiconductor Research & Development, Semiconductor Company, Toshiba Corp., Yokohama, Japan ; Yasushi Nagadomi ; Kosuke Hatsuda ; Yohji Watanabe
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This paper demonstrates the hard disk drive (HDD) performance improvement by nonvolatile FeRAM cache. First, an array architecture and data path design of 128 Mb chain FeRAM to meet HDD specifications, and a total power supply system for HDD application are presented. A 1.6 GB/s read/write bandwidth with page length of 512 Byte HDD sector size, and the data protection against sudden power failure have been realized. Second, the concept of nonvolatile FeRAM cache to utilize cache memory to the maximum by ignoring flush cache commands issued from Windows OS is presented. Third, the simulated and measured HDD performance improvements are demonstrated. The read/write bandwidth improvements by 1.12 times, 3.3 times and 1.9 times have been verified by two benchmark tests of PC Mark 05 and the copy of FD Bench v1.01, and by simulation using the PC user data for five days, respectively. These results are at the same levels of, or more effective than, the results of HDD disk rotational speed-up from 5400 rpm to 7200 rpm using a DRAM cache. The write energy is also reduced by 25% in PC Mark05 test.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:46 ,  Issue: 2 )