By Topic

An efficient QoS scheduling strategy design for IEEE802.16 based on FPGA

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Yuhong Yang ; Inf. Eng. Sch., Univ. of Sci. & Technol. Beijing, Beijing, China ; Ping Dong

A new two-layer scheduling algorithm is proposed in the paper, because the detail schedule algorithms guaranteeing Quality of Service (QoS) are not defined in IEEE 802.16. We design the IEEE802.16 architecture based on Embedded FPGA and study intensively on its QoS scheduling strategy. The new scheduling algorithm is developed from the classic 2-layer structure with new service flow priority, dynamically bandwidth allocation, admission control and compensation mechanism; which can meet the requirement of fairness and reliability on the service flow, also avoid the complex implementation of the algorithms to take into account the area and speed for FPGA design.

Published in:

Network Infrastructure and Digital Content, 2010 2nd IEEE International Conference on

Date of Conference:

24-26 Sept. 2010