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An ultra-low-power BPSK demodulator based on injection locked oscillators (ILOs) is introduced in this paper. Two second harmonic ILOs are employed to convert BPSK signals to ASK signals, which are then demodulated by an envelope detector to baseband. For sub-GHz applications, the ILOs are implemented using ring oscillators to allow compact chip area and ultra-low power dissipation. Bit error rate (BER) analysis of this demodulator indicates erroneous polarity flipping of demodulated bits due to phase noise of ILO. The prototype chip is fabricated in a 65 nm CMOS technology that consumes 228 μW of power and occupies 0.014 mm2 of die area. Measurement results reveal the demodulation of 750 MHz 5 Mb/S differential BPSK signal with sensitivity of -43 dBm. Theoretical BER analysis has been verified with erroneous flipping observed in the measurement and its probability close to the prediction.