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Analysis of Bias Stress Instability in Amorphous InGaZnO Thin-Film Transistors

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5 Author(s)
Cho, E.N. ; Sch. of Electr. & Electron. Eng., Yonsei Univ., Seoul, South Korea ; Jung Han Kang ; Chang Eun Kim ; Pyung Moon
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In this paper, we report an analysis of electrical bias stress instability in amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs). Understanding the variations of TFT characteristics under an electrical bias stress is important for commercial goals. In this experiment, the positive gate bias is initially applied to the tested a-IGZO TFTs, and subsequently, the negative gate bias is applied to the TFTs. For comparison with the subsequently negative-gate-bias-applied TFTs, another experiment is performed by directly applying the negative gate bias to the tested TFTs. For the positive gate bias stress, a positive shift in the threshold voltage (Vth) with no apparent change in the subthreshold swing (SSUB) is observed. On the other hand, when the negative gate bias is subsequently applied, the TFTs exhibit higher mobility with no significant change in SSUB, whereas the shift of the Vth is much smaller than that in the positive gate bias stress case. These phenomena are most likely induced by positively charged donor-like subgap density of states and the detrapping of trapped interface charge during the positive gate bias stress. The proposed mechanism was verified by device simulation. Thus, the proposed model can explain the instability for both positive and negative bias stresses in a-IGZO TFTs.

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Device and Materials Reliability, IEEE Transactions on  (Volume:11 ,  Issue: 1 )