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Decoupled sectored caches

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1 Author(s)
Seznec, A. ; IRISA, Rennes, France

Maintaining a low tag array size is a major issue in many cache designs. In the decoupled sectored cache, we present in this paper, the monolithic association between a cache block and a tag location is broken; the address tag location associated with a cache line location is dynamically chosen at fetch time among several possible locations. The hit ratio for a decoupled sectored cache is very close to the hit ratio for a nonsectored cache. Then a decoupled sectored cache will allow the same level of performance as a nonsectored cache, but at a significantly lower hardware cost

Published in:

Computers, IEEE Transactions on  (Volume:46 ,  Issue: 2 )

Date of Publication:

Feb 1997

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