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I/O power estimation and analysis of high-speed channels in through-silicon via (TSV)-based 3D IC

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8 Author(s)
Joohee Kim ; Dept. of Electr. Eng., KAIST, Daejeon, South Korea ; Jonghyun Cho ; Jun So Pak ; Taigon Song
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In today's integrated circuits, power consumption has become the most important factor, and must be seriously investigated among the various performance metrics. In this study, power estimations for various through-silicon via (TSV)-based three-dimensional integrated circuit (3D IC) designs were conducted in efforts to realize low-power-consumption 3D IC. In addition, the dominant power-consuming factor was found among the TSV-based interconnect components by a power comparison analysis based on the proposed model.

Published in:

Electrical Performance of Electronic Packaging and Systems (EPEPS), 2010 IEEE 19th Conference on

Date of Conference:

25-27 Oct. 2010