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Discussion on "Simulation of power electronic circuits using sparse matrix techniques" [and reply]

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4 Author(s)
Chandrasekaran, A. ; Dept. of Electr. Eng., Tennessee Technol. Univ., Cookeville, TN, USA ; Vasudevan, K. ; Rao, P.S. ; Rao, K.S.

In the original paper (Vasudevan et al., see ibid., vol. 42, no. 4, p. 409-13, 1995), the authors claimed the speeding-up of a modified nodal method developed by Sudha et al. (Ref. [3] in the original paper) by using sparsity programming and resistance modeling of the switches, instead of the inductor modeling used in Ref. [3]. As a co-author of Ref. [3], the author wishes to point out that Krishna et al. have not implemented the algorithm in Ref. [3] in the proper manner, while making comparisons for computational speedup. He details how, if sparsity methods are used in the algorithm given in Ref. [3], the computation times can be reduced much more than that given in the paper under discussion.

Published in:
Industrial Electronics, IEEE Transactions on  (Volume:44 ,  Issue: 2 )

Date of Publication: April 1997

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