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Simple high-sensitivity voltage multiplier for UHF-band semi-passive radio frequency identification tags using a standard CMOS process

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2 Author(s)
Tran, N. ; Sch. of Electron. & Inf., Kyung Hee Univ., Yongin, South Korea ; Lee, J.-W.

The authors present a new, simple approach for creating a high-sensitivity voltage multiplier for ultra high frequency (UHF)-band (900 MHz) semi-passive radio frequency identification (RFID) tag chips. The multiplier was implemented in standard digital complementary metal-oxide semiconductor (CMOS) process without using optional processes such as low-threshold transistors, Schottky diodes and metal insulator-metal capacitors. Instead, a new threshold cancellation circuit effectively reduced the threshold voltage of the transistors in a 0.18 m standard CMOS process. The multiplier, including the new threshold cancellation circuit, is also very compact (0.14 mm2). Thus, the current result provides a cost-effective solution for semi-passive RFID tag chips. Measurement of the multiplier showed that it can generate a 1.2 V output voltage for an input power as low as 14 dBm at 900 MHz. The measured sensitivity of the multiplier is one of the best among the multipliers fabricated using low-threshold transistors and Schottky diodes. The result shows that a high sensitivity RFID tag chip is achievable using a standard CMOS process without optional processes.

Published in:

Microwaves, Antennas & Propagation, IET  (Volume:4 ,  Issue: 11 )