By Topic

A power-on reset with accurate hysteresis

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)
Kalanti, A. ; Sch. of Sci. & Technol., Dept. of Micro & Nanosci., Aalto Univ., Espoo, Finland ; Aaltonen, L. ; Paavola, M. ; Kamarainen, M.
more authors

As the complexity of the digital circuit blocks continues to increase, a power-on reset, POR, circuit is needed to initialize the digital logic to the known state at the start-up. This paper represents a POR with thresholds that are insensitive to the rise time of the supply voltage. This is achieved by generating the POR pulse with a constant current reference circuit. Moreover, current mirroring is used to improve hysteresis. The designed POR has a quiescent current of 3.1 μA (VDD=3.6 V) and operates with supplies ranging from 3 V to 3.6 V. The area of the circuit is 109.9 μm × 106.65 μm and the chip was implemented with triple-well 0.35 μm HVCMOS process.

Published in:

Electronics Conference (BEC), 2010 12th Biennial Baltic

Date of Conference:

4-6 Oct. 2010