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The paper emphasizes methods, architectures and components for system-on-chip design. It describes the basic knowledge and skills for designing high-performance low-power embedded devices whose complexity increases exponentially, as so does the effort of designing them. Relying upon an appropriate design methodology which concentrates on reuse, executable specifications, and early error detection, these complexities can be mastered. The paper bundles these topics in order to provide a good understanding of all problems involved. It shows how to go from description and verification to implementation and testing presenting two systems-on-chip for two different wireless applications based on configurable processors and custom hardware accelerators.