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MOS transistor structures are widely used in modern integrated circuits (IC). Different manufacturing methods are used. Many problems, such as the length, width of the channel, the overlap of source and drain areas with gate area, the diffusion of impurities after HTTO (high temperature technological operations). The solutions for all these problems are based on the mode of manufacturing processes and its optimization, and that is another problem. In this paper, models are selected and described and the results of modeling are presented. These models evaluate the influence of lateral implantation modes for MOS transistor output characteristics, and the influence for MOS transistor output characteristics. Technological structure problems which appeared in modeling of the exact case MOS are analyzed.