By Topic

An effective shared memory allocator for reducing false sharing in NUMA multiprocessors

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Jong Woo Lee ; Software Res. & Dev. Centre, Hyundai Electron. Ind., Seoul, South Korea ; Yookun Cho

Non-uniform memory access (NUMA) time is an important issue in the design of large scale shared memory multiprocessors. One implication of NUMA architecture, however, is that locality of reference is crucial to the performance of the entire systems. So exploitation of locality of reference is necessarily supported by one or more system levels for efficient data sharing. Unfortunately, data sharing introduces a problem called false sharing which occurs when several independent objects which may have different access patterns are allocated to the same unit of movable memory (in our case, a page of virtual memory). In this paper we propose a simple and effective shared memory allocation mechanism for reducing the false sharing. Our design goal is to reduce the occurrences of false sharing misses by allocating independent objects that may have different access patterns to different pages. We use execution-driven simulation of real parallel applications to evaluate the effectiveness of our shared memory allocator. Our observation shows that by using our shared memory allocator, considerable amount of false sharing misses can be reduced and so the overhead of memory coherence protocol can also be reduced

Published in:

Algorithms & Architectures for Parallel Processing, 1996. ICAPP 96. 1996 IEEE Second International Conference on

Date of Conference:

11-13 Jun 1996