By Topic

SimP: a core for FPLD-based custom-configurable processors

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Z. Salcic ; Dept. of Electr. & Electron. Eng., Auckland Univ., New Zealand ; B. Maunder

Standard building blocks play a very important role in the use of new semiconductor technologies such as field programmable logic devices (FPLDs). New design methodologies, that will increase designer productivity and the general quality of design, are necessary in order to use the power of FPLDs especially in embedded applications. One of the promising methods is the merging of the hardware and software parts of the solution, where general processor cells become very important as the core of software part of solution, in the custom computing machine. In this paper we present a new general purpose simple processor cell which is easily implemented in an FPLD and used as a library block that can be extended or combined with other library cells to form custom application-specific configurations

Published in:

ASIC, 1996., 2nd International Conference on

Date of Conference:

21-24 Oct 1996