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This paper presents ultra low-power adiabatic flip-flops that operate on near-threshold region. The near-threshold flip-flops are realized by PAL-2N (pass-transistor adiabatic logic with NMOS pull-down configuration) circuits. A near-threshold mode-10 counter is verified. All circuits are simulated using NCSU PDK 45 nm technology by varying supply voltage from 0.2 V to 0.9 V with 0.1 V steps. Based on the simulation results, the adiabatic flip-flops that operate on medium-voltage region can not only keep reasonable speed but also reduce greatly energy consumptions.
Published in:
Circuits,Communications and System (PACCS), 2010 Second Pacific-Asia Conference on
(Volume:1
)
Date of Conference: 1-2 Aug. 2010
- Page(s):
- 446 - 449
- Print ISBN:
- 978-1-4244-7969-6
- INSPEC Accession Number:
- 11651150
- Conference Location :
- Beijing
- Digital Object Identifier :
- 10.1109/PACCS.2010.5626977
- Product Type:
- Conference Publications
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