By Topic

Exploiting control management to accelerate Radix-4 FFT on a reconfigurable platform

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Waqar Hussain ; Department of Computer Systems, Tampere University of Technology, P. O. Box 553, FIN-33101, Finland ; Fabio Garzia ; Jari Nurmi

In this paper, we present the mapping of 64 and 1024-point FFT algorithms on a Radix-4 FFT accelerator generated using a hardware template called CREMA. The accelerator designed is targeted for FPGA. The execution time for 64 and 1024-point FFT meets 802.11a/g and 3GPP-LTE timing constraints. A speed-up from 3X to 68X was achieved when both of the implementations were compared with similar and general purpose platforms.

Published in:

System on Chip (SoC), 2010 International Symposium on

Date of Conference:

29-30 Sept. 2010