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Mixed-Mode Chip Implementation of Digital Space SVPWM With Simplified-CPU and 12-Bit 2.56 Ms/s Switched-Current Delta-Sigma ADC in Motor Drive

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4 Author(s)
Guo-Ming Sung ; Department of Electrical Engineering , National Taipei University of Technology, Taipei, Taiwan ; Chih-Ping Yu ; Tsai-Wang Hung ; Hsiang-Yuan Hsieh

This study presents a mixed-mode chip for use in a vector-controlled induction motor drive. It exhibits digital scalar space vector pulse width modulation (DSSVPWM), and comprises a proportional-integral (PI) controller, a simplified central processing unit (CPU), and a second-order delta-sigma analog-to-digital converter (Δ-Σ ADC). It is fabricated using a standard 0.35-μm 2P4M CMOS process. All of the circuits, digital and analog, are realized in a single chip as a convenient, high-speed, highly integrated, and low-cost solution. The digital circuit contains a DSSVPWM, a simplified CPU, a PI controller, and a decimator filter; the analog circuit is a second-order switched-current (SI) delta-sigma modulator, which includes two discrete-time integrators, a current comparator, a current-mode digital-to-analog converter, a D-type flip-flop, a nonoverlapping clock generator, and a bias current generator. This mixed-mode chip constitutes a closed-loop motor drive system with stable performance, short response times, precise controllability, and flexibility. Experimental results indicate that the digital circuit has a power consumption of 17.95 mW and a maximum frequency of 100 MHz, and that the SNR and power dissipation of the analog circuit are 71.9 dB and 12.1 mW, respectively, with a bandwidth of 10 kHz, an over sampling ratio of 128, and a sampling rate of 2.56 MHz at a power supply of 3.3 V.

Published in:

IEEE Transactions on Power Electronics  (Volume:27 ,  Issue: 2 )