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This paper presents a new series inductance interval (SII) PFC, using an auxiliary winding, to limit double power processing interval around the input voltage zero crossing. This limitation removes the unessential double processing power and consequently reduces the converter loss. Since the converter is a SII type, this converter has a limited voltage stress on the bulk capacitor and the converter can satisfy the IEC 6100 3-2 class D standard. The converter is analyzed, a design strategy is presented and the results are verified with PSIM simulation and experimental results.