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A Virtual-ADC Digital Background Calibration Technique for Multistage A/D Conversion

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5 Author(s)
Bei Peng ; Beijing Univ. of Technol., Beijing, China ; Hao Li ; Seung-Chul Lee ; Pingfen Lin
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A nonlinear adaptive digital calibration technique for multistage analog-to-digital converters (ADCs) is presented. The approach is derived from a replica-path scaling principle inspired by the parallel-ADC equalization architecture. The treatment of residue gain nonlinearities leads to potentially significant power savings for a simple modification of the first ADC stage. The design tradeoffs involved in this technique, particularly a band-limited interpolator employed, are discussed in detail. Computer simulations demonstrate signal-to-noise-plus-distortion-ratio and spurious-free-dynamic-range improvements from 40 to 90 dB and 45 to more than 100 dB, respectively, for a 15-bit pipelined ADC.

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Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:57 ,  Issue: 11 )