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Substrate bias dependency of sense margin and retention in bulk FinFET 1T-DRAM cells

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6 Author(s)

The substrate bias in bulk FinFET devices can be used to increase both the sense margin and retention time in 1T memory cells. For given biasing conditions, a substrate bias can be found where sense margin and retention time are optimal. This substrate bias results from a trade-off between the storage of electrons and holes and the impact of the READ conditions.

Published in:

Solid-State Device Research Conference (ESSDERC), 2010 Proceedings of the European

Date of Conference:

14-16 Sept. 2010